The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 02, 2020

Filed:

Mar. 27, 2019
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Sagheer Ahmad, Cupertino, CA (US);

Jaideep Dastidar, San Jose, CA (US);

Brian C. Gaide, Erie, CO (US);

Juan J. Noguera Serra, San Jose, CA (US);

Ian A. Swarbrick, Santa Clara, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17728 (2020.01); H03K 19/17736 (2020.01); H03K 19/17704 (2020.01);
U.S. Cl.
CPC ...
H03K 19/17728 (2013.01); H03K 19/17736 (2013.01); H03K 19/17712 (2013.01);
Abstract

A device can include programmable logic circuitry, a processor system coupled to the programmable logic circuitry, and a network-on-chip. The network-on-chip is coupled to the programmable logic circuitry and the processor system. The network-on-chip is programmable to establish user specified data paths communicatively linking a circuit block implemented in the programmable logic circuitry and the processor system. The programmable logic circuitry, the network-on-chip, and the processor system are configured using a platform management controller.


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