The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 19, 2020

Filed:

Mar. 06, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventors:

Er Hu Zheng, Shanghai, CN;

Lu Jun Zou, Shanghai, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 29/788 (2006.01); H01L 21/28 (2006.01); H01L 29/423 (2006.01); H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 29/6653 (2013.01); H01L 21/28273 (2013.01); H01L 21/31144 (2013.01); H01L 21/76802 (2013.01); H01L 29/42324 (2013.01); H01L 29/6656 (2013.01); H01L 29/66825 (2013.01); H01L 29/7881 (2013.01); H01L 21/0217 (2013.01); H01L 21/02164 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 29/0649 (2013.01); H01L 29/4916 (2013.01);
Abstract

A semiconductor device and a fabrication method are provided. The fabrication method includes providing a gate structure on a substrate and a first protective layers on the gate structure; forming an initial sidewall spacer on a sidewall of each of the gate structure and the first protective layer; forming a first sidewall spacer on a sidewall of the initial sidewall spacer, the first and initial sidewall spacers being made of different materials; forming a second sidewall spacer by removing a portion of the initial sidewall spacer, leaving a trench formed above the second sidewall spacer and between the first sidewall spacer and the first protective layer; and forming a second protective layer in the trench, the second protective layer and the first sidewall spacer being made of a same material. The second sidewall spacer has a top surface higher than or level with a top surface of the gate structure.


Find Patent Forward Citations

Zheng, Er. (2020). Semiconductor structure and fabrication method thereof (U.S. Patent No. 10658489). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10658489

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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