The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 05, 2020

Filed:

Jan. 03, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Pranita Kerber, Mount Kisco, NY (US);

Qiqing C. Ouyang, Yorktown Heights, NY (US);

Alexander Reznicek, Troy, NY (US);

Dominic J. Schepis, Wappingers Falls, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/84 (2006.01); H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 29/161 (2006.01);
U.S. Cl.
CPC ...
H01L 21/845 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 27/092 (2013.01); H01L 27/1211 (2013.01); H01L 29/1054 (2013.01); H01L 29/7849 (2013.01); H01L 21/0245 (2013.01); H01L 21/02381 (2013.01); H01L 21/02488 (2013.01); H01L 21/02502 (2013.01); H01L 21/02532 (2013.01); H01L 27/0924 (2013.01); H01L 29/161 (2013.01);
Abstract

A method of making a semiconductor device includes forming a first silicon germanium layer on a substrate, the first silicon germanium layer forming a portion of a first transistor; forming a second silicon germanium layer on the substrate adjacent to the first silicon germanium layer, the second silicon germanium layer forming a portion of a second transistor and having a germanium content that is different than the first silicon germanium layer and a thickness that is substantially the same; growing by an epitaxial process a compressively strained silicon germanium layer on the first silicon germanium layer, and a tensile strained silicon germanium layer on the second silicon germanium layer; patterning a first fin in the compressively strained silicon germanium layer and the first silicon germanium layer; and patterning a second fin in the tensile strained silicon germanium layer and the second silicon germanium layer.


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