The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Apr. 11, 2017
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventor:

Wen-Han Wang, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/24 (2006.01); H03K 17/22 (2006.01); H03K 19/0185 (2006.01); H03K 17/687 (2006.01);
U.S. Cl.
CPC ...
H03K 17/223 (2013.01); H03K 19/018521 (2013.01); G06F 1/24 (2013.01); H03K 17/6872 (2013.01);
Abstract

A voltage level shifting circuit includes two PMOS transistors and four NMOS transistors. Sources of the PMOS transistors receive a first supply voltage value, a first PMOS transistor gate coupled with drains of second PMOS and NMOS transistors is a first output, and a second PMOS transistor gate coupled with drains of first PMOS and NMOS transistors is a second output. The first NMOS transistor source is coupled with a third NMOS transistor drain, and the third NMOS transistor gate is a first input. The second NMOS transistor source is coupled with a fourth NMOS transistor drain, and the fourth NMOS transistor gate is a second input. A voltage generating circuit generates a voltage at first and second NMOS transistor gates based on the first supply voltage value and on a signal, the signal behaving based on the first supply voltage value and a different second supply voltage value.


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