The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 28, 2020

Filed:

Mar. 09, 2018
Applicant:

Macronix International Co., Ltd., Hsinchu, TW;

Inventors:

Chia-Ching Li, Hsinchu, TW;

Yi-Ching Liu, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/04 (2006.01); G06F 12/02 (2006.01); G11C 16/28 (2006.01); G11C 11/4099 (2006.01); G11C 11/408 (2006.01);
U.S. Cl.
CPC ...
G11C 16/28 (2013.01); G06F 12/0246 (2013.01); G11C 11/4085 (2013.01); G11C 11/4099 (2013.01); G11C 16/0483 (2013.01);
Abstract

A memory device comprising: a memory cell array and a memory controller configured to program data to memory cells during a programming cycle using operations comprising: during a setup stage, providing a first voltage level to word lines, a second voltage level to a first dummy word line, and a fourth voltage level to second dummy word lines being different from the first dummy word line, wherein the first voltage level is lower than a threshold voltage of a first transistor coupled to the first dummy word line and the second voltage level and the fourth voltage are higher than the threshold voltage, during a program stage, providing a third voltage level to first word lines to program data to memory cells coupled to the first word lines, the second voltage level to the first dummy word line, and the fourth voltage level to the second dummy word lines.


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