The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2020
Filed:
Sep. 06, 2018
Applicant:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Inventors:
Chih-Hang Chang, Taoyuan, TW;
I-Shi Wang, New Taipei, TW;
Jen-Hao Liu, Zhunan Township, Miaoli County, TW;
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
B81C 1/00 (2006.01); B81C 3/00 (2006.01);
U.S. Cl.
CPC ...
B81C 1/00238 (2013.01); B81C 1/00269 (2013.01); B81C 1/00888 (2013.01); B81C 3/005 (2013.01); B81C 2201/013 (2013.01); B81C 2201/0143 (2013.01); B81C 2201/0146 (2013.01); B81C 2203/035 (2013.01);
Abstract
A method for forming a semiconductor device structure is provided. The method includes receiving a first wafer having multiple predetermined die areas. The method also includes forming a recess in the first wafer, and the recess extends in a direction substantially parallel to an edge of one of the predetermined die areas. The method further includes receiving a second wafer. In addition, the method includes bonding the first wafer and the second wafer at an elevated temperature after the recess is formed.