The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 24, 2020

Filed:

Oct. 10, 2018
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Qingqing Liang, San Diego, CA (US);

Ravi Pramod Kumar Vedula, San Diego, CA (US);

Sivakumar Kumarasamy, San Diego, CA (US);

George Pete Imthurn, San Diego, CA (US);

Sinan Goktepeli, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/49 (2006.01); H01L 21/762 (2006.01); H01L 29/786 (2006.01); H01L 27/12 (2006.01); H01L 21/28 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7824 (2013.01); H01L 21/28035 (2013.01); H01L 21/76251 (2013.01); H01L 29/0865 (2013.01); H01L 29/0882 (2013.01); H01L 29/0886 (2013.01); H01L 29/4916 (2013.01); H01L 29/66484 (2013.01); H01L 29/66681 (2013.01); H01L 29/7831 (2013.01);
Abstract

An integrated circuit is described. The integrated circuit includes a metal oxide semiconductor field effect transistor (MOSFET). The MOSFET is on a first surface of an insulator layer of the integrated circuit. The MOSFET including a source region, a drain region, and a front gate. The MOSFET also includes an extended drain region between the drain region and a well proximate the front gate. The integrated circuit also includes back gates on a second surface opposite the first surface of the insulator layer. The back gates are overlapped by the extended drain region.


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