The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 10, 2020

Filed:

Mar. 21, 2018
Applicant:

Invensas Corporation, San Jose, CA (US);

Inventors:

Guilian Gao, San Jose, CA (US);

Charles G. Woychik, San Jose, CA (US);

Cyprian Emeka Uzoh, San Jose, CA (US);

Liang Wang, Milpitas, CA (US);

Assignee:

Invensas Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/36 (2006.01); H01L 23/00 (2006.01); H01L 23/367 (2006.01); H01L 23/373 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 23/36 (2013.01); H01L 23/367 (2013.01); H01L 23/3675 (2013.01); H01L 23/373 (2013.01); H01L 24/00 (2013.01); H01L 24/11 (2013.01); H01L 24/17 (2013.01); H01L 24/27 (2013.01); H01L 24/32 (2013.01); H01L 24/81 (2013.01); H01L 24/83 (2013.01); H01L 25/50 (2013.01); H01L 2224/11334 (2013.01); H01L 2224/16057 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/2761 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81815 (2013.01); H01L 2224/838 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06565 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/01006 (2013.01); H01L 2924/10253 (2013.01);
Abstract

A device with thermal control is presented. In some embodiments, the device includes a plurality of die positioned in a stack, each die including a chip, interconnects through a thickness of the chip, metal features of electrically conductive composition connected to the interconnects on a bottom side of the chip, and adhesive or underfill layer on the bottom side of the chip. At least one thermally conducting layer, which can be a pyrolytic graphite layer, a layer formed of carbon nanotubes, or a graphene layer, is coupled between a top side of one of the plurality of die and a bottom side of an adjoining die in the stack. A heat sink can be coupled to the thermally conducting layer.


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