The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 03, 2020

Filed:

Aug. 21, 2018
Applicants:

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Inventor:

Meng Zhao, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/417 (2006.01); H01L 21/84 (2006.01); H01L 21/8238 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7853 (2013.01); H01L 21/823821 (2013.01); H01L 21/845 (2013.01); H01L 29/41791 (2013.01); H01L 29/66803 (2013.01); H01L 29/66818 (2013.01); H01L 29/7851 (2013.01);
Abstract

The present disclosure provides semiconductor devices and methods for manufacturing same and relates to the field of semiconductor technologies. Some implementations of a method may include: providing a semiconductor structure, where the semiconductor structure includes a substrate, a semiconductor fin having a first conductivity type and disposed on the substrate, and a gate structure covering a part of the semiconductor fin, where the semiconductor fin includes a first part and a second part respectively located on two sides of the gate structure; executing first doping on the first part and the second part of the semiconductor fin, where a dopant from the first doping has a second conductivity type that is opposite to the first conductivity type; and after the first doping is executed, forming a source on the first part of the semiconductor fin and forming a drain on the second part of the semiconductor fin. The present disclosure can reduce a series resistance between a channel region in the semiconductor fin and the source and the drain, thereby improving device performance.


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