The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2020

Filed:

Feb. 12, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Lisa F. Edge, Watervliet, NY (US);

Hemanth Jagannathan, Niskayuna, NY (US);

Paul C. Jamison, Averill Park, NY (US);

Vamsi K. Paruchuri, Clifton Park, NY (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/8238 (2006.01); H01L 27/092 (2006.01); H01L 27/12 (2006.01); H01L 29/51 (2006.01); H01L 29/78 (2006.01); H01L 21/84 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823842 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 21/845 (2013.01); H01L 27/0924 (2013.01); H01L 27/1211 (2013.01); H01L 29/4966 (2013.01); H01L 29/51 (2013.01); H01L 29/517 (2013.01); H01L 29/66545 (2013.01); H01L 29/785 (2013.01); H01L 29/786 (2013.01);
Abstract

An electrical device that includes a p-type semiconductor device having a p-type work function gate structure including a first high-k gate dielectric, a first metal containing buffer layer, a first titanium nitride layer having a first thickness present on the metal containing buffer layer, and a first gate conductor contact. A mid gap semiconductor device having a mid gap gate structure including a second high-k gate dielectric, a second metal containing buffer layer, a second titanium nitride layer having a second thickness that is less than the first thickness present, and a second gate conductor contact. An n-type semiconductor device having an n-type work function gate structure including a third high-k gate dielectric present on a channel region of the n-type semiconductor device, a third metal containing buffer layer on the third high-k gate dielectric and a third gate conductor fill present atop the third metal containing buffer layer.


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