The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

May. 30, 2018
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Yun-Yu Wang, Poughkeepsie, NY (US);

Jochonia Nxumalo, Wappingers Falls, NY (US);

Ahmad Katnani, Poughkeepsie, NY (US);

Dimitrios Ioannou, White Plains, NY (US);

Kenneth Bandy, Red Hook, NY (US);

Jeffrey Brown, Hopewell Junction, NY (US);

Michael J. MacDonald, Yorktown Heights, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/02 (2006.01); H01L 29/78 (2006.01); H01L 23/29 (2006.01); H01L 29/40 (2006.01); H01L 21/223 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66568 (2013.01); H01L 21/0217 (2013.01); H01L 21/02271 (2013.01); H01L 21/02299 (2013.01); H01L 21/02348 (2013.01); H01L 21/223 (2013.01); H01L 21/823468 (2013.01); H01L 23/291 (2013.01); H01L 29/401 (2013.01); H01L 29/7833 (2013.01); H01L 29/7843 (2013.01);
Abstract

Methods of improving hot carrier parameters in a field-effect transistor by hydrogen reduction. A gate structure of the field-effect transistor is formed on a substrate, and the substrate is heated inside a deposition chamber to a given process temperature for a given time period. After the time period concludes, a conformal layer is deposited at the given process temperature over the gate structure, and is subsequently etched to form sidewall spacers on the gate structure. After the sidewall spacers are formed, a capping layer is conformally deposited over the gate structure and the sidewall spacers, and cured with an ultraviolet light treatment. An interconnect structure may be formed over the field-effect transistor and the capping layer, and a moisture barrier layer may be formed over the interconnect structure. The moisture barrier layer is composed of a material that is permeable to hydrogen and impermeable to water molecules.


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