The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2020

Filed:

Jun. 02, 2016
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Chih-Kai Hsu, Tainan, TW;

Yu-Hsiang Hung, Tainan, TW;

Wei-Chi Cheng, Kaohsiung, TW;

Ssu-I Fu, Kaohsiung, TW;

Jyh-Shyang Jenq, Pingtung County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/535 (2006.01); H01L 29/267 (2006.01); H01L 29/24 (2006.01); H01L 29/165 (2006.01); H01L 29/161 (2006.01); H01L 29/08 (2006.01); H01L 23/528 (2006.01); H01L 21/768 (2006.01); H01L 29/78 (2006.01); H01L 23/485 (2006.01);
U.S. Cl.
CPC ...
H01L 23/535 (2013.01); H01L 21/76805 (2013.01); H01L 21/76816 (2013.01); H01L 21/76819 (2013.01); H01L 21/76829 (2013.01); H01L 21/76895 (2013.01); H01L 23/485 (2013.01); H01L 23/5283 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; forming a gate structure on the substrate; forming an epitaxial layer adjacent to the gate structure; forming an interlayer dielectric (ILD) layer on the gate structure; forming a first contact hole in the ILD layer adjacent to the gate structure; and forming a cap layer in the recess, in which a top surface of the cap layer is even with or lower than a top surface of the substrate.


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