The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 04, 2020

Filed:

Jul. 12, 2016
Applicant:

SK Hynix Inc., Gyeonggi-do, KR;

Inventors:

Dong-Soo Kim, Gyeonggi-do, KR;

Sung-Won Lim, Gyeonggi-do, KR;

Eun-Jeong Kim, Gyeonggi-do, KR;

Hyun-Jin Chang, Gyeonggi-do, KR;

Keun Heo, Gyeonggi-do, KR;

Jee-Hyun Kim, Gyeonggi-do, KR;

Assignee:

SK hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 27/108 (2006.01); H01L 29/10 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01); H01L 27/22 (2006.01); H01L 27/24 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4236 (2013.01); H01L 27/10823 (2013.01); H01L 29/105 (2013.01); H01L 29/4966 (2013.01); H01L 29/511 (2013.01); H01L 29/517 (2013.01); H01L 27/228 (2013.01); H01L 27/2436 (2013.01);
Abstract

A semiconductor device includes at least one trench extending into a semiconductor substrate and lined with a gate dielectric layer; a dipole inducing layer covering a lowermost portion of the lined trench; a gate electrode covering the dipole inducing layer and filled in the lined trench; and doping regions, in the semiconductor substrate, separated from each other by the lined trench and separated from the dipole inducing layer.


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