The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 28, 2020

Filed:

Dec. 18, 2017
Applicant:

Pdf Solutions, Inc., San Jose, CA (US);

Inventors:

Yih-Yuh Kelvin Doong, Zhubei, TW;

Sheng-Che Lin, BaoShan Township, TW;

Assignee:

PDF SOLUTIONS, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/66 (2006.01);
U.S. Cl.
CPC ...
H01L 22/20 (2013.01);
Abstract

Improved methods for manufacturing semiconductor product wafer with the additional use of non-product masks are described. According to certain aspects of the invention, an evaluation wafer is first manufactured by utilizing at least one non-product mask to process one or more layer(s) on the evaluation wafer, and subsequently utilizing at least one unaltered product mask to process an evaluation-region-of-interest on the evaluation wafer. The evaluation-region-of-interest is evaluated by measuring the state of one or more feature(s) in the evaluation-region-of-interest using voltage contrast inspection (VCi). The measurements are then used to identify failures in the evaluation-region-of-terest. In response to identifying a failure in the evaluation-region-of-interest, the manufacturing process is improved by modifying at least one parameter associated with at least one processing step and manufacturing product wafers utilizing the at least one processing step(s) with the at least one modified parameter(s).


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