The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 07, 2020

Filed:

Mar. 08, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Chan-hyeong Lee, Seoul, KR;

Hoon-joo Na, Hwaseong-si, KR;

Sung-in Suh, Seoul, KR;

Min-woo Song, Seongnam-si, KR;

Byoung-hoon Lee, Suwon-si, KR;

Hu-yong Lee, Seoul, KR;

Sang-jin Hyun, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/772 (2006.01); H01L 29/49 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4908 (2013.01); H01L 21/28088 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66742 (2013.01); H01L 29/775 (2013.01); H01L 29/78618 (2013.01); H01L 29/78696 (2013.01); H01L 29/78681 (2013.01); H01L 29/78684 (2013.01);
Abstract

A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.


Find Patent Forward Citations

Loading…