The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 07, 2020
Filed:
Mar. 25, 2016
Applicant:
Great Wall Semiconductor Corporation, Tempe, AZ (US);
Inventor:
Patrick M. Shea, Oviedo, FL (US);
Assignee:
Great Wall Semiconductor Corporation, Tempe, AZ (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 25/00 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/31 (2006.01); H01L 25/07 (2006.01); H01L 21/60 (2006.01);
U.S. Cl.
CPC ...
H01L 23/4951 (2013.01); H01L 23/49562 (2013.01); H01L 2021/60022 (2013.01);
Abstract
A leadframe includes a common contact. A first transistor is disposed over the leadframe with a first interconnect structure of the first transistor disposed over the common contact. A second transistor is disposed over the leadframe with a second interconnect structure of the second transistor disposed over the common contact.
Shea, Patrick. (2020). Co-packaged die on leadframe with common contact (U.S. Patent No. 10529651). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10529651
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile