The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

Sep. 06, 2019
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

En-Chiuan Liou, Tainan, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Chih-Wei Yang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 29/08 (2006.01); H01L 29/06 (2006.01); H01L 27/12 (2006.01); H01L 21/84 (2006.01); H01L 29/66 (2006.01); H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823481 (2013.01); H01L 21/823418 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/84 (2013.01); H01L 27/0886 (2013.01); H01L 27/1211 (2013.01); H01L 29/0653 (2013.01); H01L 29/0847 (2013.01); H01L 21/8213 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, a gate structure, an isolation structure, and a source/drain region. The semiconductor substrate includes a fin. The gate structure is disposed on the fin and is disposed straddling the fin. The isolation structure covers a sidewall and a top surface of the fin. The source/drain region is disposed in the fin and extends beyond the top surface of the fin.


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