The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 31, 2019

Filed:

May. 21, 2018
Applicant:

Mentor Graphics Corporation, Wilsonville, OR (US);

Inventors:

Givargis Avareh Danialy, San Jose, CA (US);

Martin Keim, Sherwood, OR (US);

Assignee:

Mentor Graphics Corporation, Wilsonville, OR (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/3177 (2006.01); G01R 31/317 (2006.01); G01R 31/3185 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31712 (2013.01); G01R 31/31855 (2013.01); G01R 31/318566 (2013.01);
Abstract

A reconfigurable scan network in a circuit is configured such that a first scan path is used if a programmable component has no stuck-at fault and a second scan path is used if the programmable component has a stuck-at fault. A test pattern having a length equal to a length of the second path is shifted into the reconfigurable scan network, and a part or a whole of the test pattern is then shifted out from the reconfigurable scan network. The part or the whole of the test pattern being shifted out is analyzed to determine whether the programmable component has the stuck-at fault.


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