The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 24, 2019
Filed:
Oct. 31, 2017
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Neng-Kuo Chen, Sinshih Township, TW;
Clement Hsingjen Wann, Carmel, NY (US);
Yi-An Lin, Taipei, TW;
Chun-Wei Chang, Taoyuan, TW;
Sey-Ping Sun, Hsinchu, TW;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method of fabricating a semiconductor device includes depositing a contact etch stop layer (CESL) over a dummy gate electrode, a source/drain (S/D) region and an isolation feature. The method further includes performing a first CMP to expose the dummy gate electrode. The method further includes removing an upper portion of the CESL. The method further includes performing a second CMP using a slurry different from the first CMP to expose the CESL over the S/D region, wherein, following the second CMP, an entire top surface of the CESL over the S/D region and over the isolation feature is substantially level with a top surface of the dummy gate electrode.