The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 24, 2019

Filed:

Jun. 27, 2017
Applicant:

Applied Materials, Inc., Santa Clara, CA (US);

Inventors:

Prayudi Lianto, Singapore, SG;

Guan Huei See, Singapore, SG;

Arvind Sundarrajan, Singapore, SG;

Ranga Rao Arnepalli, Krishna, IN;

Prerna Goradia, Mumbai, IN;

Assignee:

APPLIED MATERIALS, INC., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 21/02 (2006.01); H01L 21/3105 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 24/96 (2013.01); H01L 21/02118 (2013.01); H01L 21/02282 (2013.01); H01L 21/31053 (2013.01); H01L 21/4857 (2013.01); H01L 21/568 (2013.01); H01L 2224/95001 (2013.01);
Abstract

A fan-out process using chemical mechanical planarization (CMP) reduces the step-height between a semiconductor die and the surrounding overmolding of a reconstituted wafer. The reconstituted wafer is formed by overmolding a back side of at least one die that is placed with an active side facing down. The reconstituted wafer is then oriented to expose the die and the active side. A polymer layer is then formed over the reconstituted wafer. A CMP process then removes a portion of the polymer layer until a certain thickness above the die surface is obtained, reducing the step-height between the polymer layer on top of the die surface and the polymer layer on the adjacent mold compound surface. The CMP process can also be performed after a subsequent redistribution layer is formed on the reconstituted wafer.


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