The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Mar. 13, 2018
Applicant:

Stats Chippac Pte. Ltd., Singapore, SG;

Inventors:

Won Kyoung Choi, Singapore, SG;

Pandi Chelvam Marimuthu, Singapore, SG;

Assignee:

STATS ChipPAC Pte. Ltd., Singapore, SG;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); H01L 21/48 (2006.01); H01L 21/50 (2006.01); H01L 23/31 (2006.01); H01L 23/538 (2006.01); H01L 21/768 (2006.01); H01L 25/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3128 (2013.01); H01L 21/568 (2013.01); H01L 21/76802 (2013.01); H01L 23/5384 (2013.01); H01L 25/50 (2013.01);
Abstract

A semiconductor device has a carrier and a semiconductor die disposed over the carrier. A dummy die is disposed over the carrier as well. A first encapsulant is deposited over the semiconductor die and dummy die. The dummy die and a first portion of the first encapsulant is backgrinded while a second portion of the first encapsulant remains covering the semiconductor die. Backgrinding the dummy die fully removes the dummy die while the second portion of the first encapsulant remains covering the semiconductor die. A second encapsulant is optionally deposited over the dummy die prior to disposing the dummy die over the carrier. A conductive pillar is optionally formed over the dummy die prior to depositing the second encapsulant. The carrier is removed to expose an active surface of the semiconductor die. A build-up interconnect structure is formed over the active surface after removing the carrier.


Find Patent Forward Citations

Choi, Won. (2019). Method of packaging thin die and semiconductor device including thin die (U.S. Patent No. 10510632). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10510632

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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