The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Aug. 03, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chen-Hao Wu, Keelung, TW;

Shen-Nan Lee, Hsinchu County, TW;

Chung-Wei Hsu, Hsinchu County, TW;

Tsung-Ling Tsai, Hsinchu, TW;

Teng-Chun Tsai, Hsinchu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/321 (2006.01); H01L 21/768 (2006.01); H01L 29/417 (2006.01); H01L 29/66 (2006.01); H01L 29/165 (2006.01); H01L 29/78 (2006.01); H01L 21/3105 (2006.01); H01L 29/08 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3212 (2013.01); H01L 21/31051 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 29/0847 (2013.01); H01L 29/165 (2013.01); H01L 29/41791 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01);
Abstract

A method for manufacturing a semiconductor device includes forming a gate electrode over a substrate; forming a hard mask over the gate electrode, in which the hard mask comprises a metal oxide; forming an interlayer dielectric (ILD) layer over the hard mask; forming a contact hole in the ILD layer, wherein the contact hole exposes a source/drain; filling the contact hole with a conductive material; and applying a chemical mechanical polish process to the ILD layer and the conductive material, wherein the chemical mechanical polish process stops at the hard mask, the chemical mechanical polish process uses a slurry containing a boric acid or its derivative, the chemical mechanical polish process has a first removal rate of the ILD layer and a second removal rate of the hard mask, and a first ratio of the first removal rate to the second removal rate is greater than about 5.


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