The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Jan. 13, 2016
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Rajesh M Sankaran, Portland, OR (US);

Randolph L Campbell, Folsom, CA (US);

Prashant Sethi, Folsom, CA (US);

David J Harriman, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/10 (2016.01); G06F 12/1027 (2016.01); G06F 9/455 (2018.01); G06F 12/1009 (2016.01); G06F 12/1081 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 9/45558 (2013.01); G06F 12/1009 (2013.01); G06F 12/1081 (2013.01); G06F 2009/45579 (2013.01); G06F 2009/45583 (2013.01); G06F 2212/657 (2013.01); G06F 2212/68 (2013.01);
Abstract

Embodiments of an invention for address translation for scalable I/O device virtualization are disclosed. In one embodiment, an apparatus includes PASID table lookup circuitry. The PASID table lookup circuitry is to find a PASID-entry in a PASID table. The PASID-entry is to include a PASID processing mode (PPM) indicator and a first pointer to a first translation structure. The PPM indicator is to specify one of a plurality of translation types, the one of the plurality of translation types to use the first translation structure.


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