The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 17, 2019

Filed:

Feb. 06, 2017
Applicant:

Lam Research Corporation, Fremont, CA (US);

Inventors:

Peter S. Thaulad, San Jose, CA (US);

Arulselvam Simon Jeyapalan, Newark, CA (US);

Richard M. Blank, San Jose, CA (US);

Tyson Lee Ringold, Mountain View, CA (US);

Victor Eduardo Espinosa, III, San Luis Obispo, CA (US);

Assignee:

Lam Research Corporation, Fremont, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/02 (2006.01); G01P 15/18 (2013.01); H01L 21/67 (2006.01);
U.S. Cl.
CPC ...
G01P 15/18 (2013.01); H01L 21/67253 (2013.01);
Abstract

A test wafer having two spaced-apart accelerometers mounted thereon is disclosed. The accelerometers may be positioned at locations located along a common axis passing through the center of gravity of the test wafer. The test wafer may include a controller that may be used to transmit acceleration data collected by the accelerometers to another device. In some implementations, a semiconductor processing tool is provided that includes a test wafer receptacle for storing a test wafer that remains with the semiconductor processing tool and that may be retrieved by a wafer handling robot for performing a test cycle during periods when the wafer handling robot is not performing substrate transport operations.


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