The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 10, 2019

Filed:

Jul. 20, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Sunil K. Singh, Mechanicville, NY (US);

Sohan S. Mehta, Saratoga Springs, NY (US);

Sherjang Singh, Clifton Park, NY (US);

Ravi P. Srivastava, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/311 (2006.01); H01L 21/768 (2006.01); H01L 21/027 (2006.01); H01L 21/033 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76802 (2013.01); H01L 21/0274 (2013.01); H01L 21/0332 (2013.01); H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 21/76877 (2013.01);
Abstract

Methods of lithographic patterning to form interconnect structures for a chip. A hardmask layer is formed on a dielectric layer. A sacrificial layer is formed on the hardmask layer. First opening and second openings are formed in the sacrificial layer that extend through the sacrificial layer to the hardmask layer. A resist layer is formed on the sacrificial layer. An opening is formed in the resist layer that is laterally located between the first opening in the first sacrificial layer and the second opening in the first sacrificial layer. The resist layer is comprised of a metal oxide resist material that is removable selective to the hardmask layer.


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