The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 26, 2019

Filed:

Nov. 13, 2018
Applicants:

United Microelectronics Corp., Hsin-Chu, TW;

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;

Inventor:

Yukihiro Nagai, Saijo, JP;

Assignees:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/762 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/76224 (2013.01); H01L 21/76229 (2013.01);
Abstract

A manufacturing method of a semiconductor structure includes the following steps. A first trench isolation is formed in a substrate. A second trench isolation is formed in the substrate after the step of forming the first trench isolation. The second trench isolation is formed at a side of the first trench isolation, and the second trench isolation is directly connected with the first trench isolation. The semiconductor structure includes the substrate, the first trench isolation, and the second trench isolation. A material of the second trench isolation is different from a material of the first trench isolation. The first trench isolation is disposed at one side of the second trench isolation, and the second trench isolation is directly connected with the first trench isolation.


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