The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2019

Filed:

Mar. 20, 2018
Applicants:

Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;

Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;

Inventor:

Hao Deng, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/762 (2006.01); H01L 29/423 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/02271 (2013.01); H01L 21/28088 (2013.01); H01L 21/762 (2013.01); H01L 21/76829 (2013.01); H01L 21/76843 (2013.01); H01L 29/4232 (2013.01); H01L 29/4966 (2013.01); H01L 29/513 (2013.01); H01L 29/517 (2013.01);
Abstract

A semiconductor structure and a fabrication method are provided. The fabrication method includes: providing a substrate; forming a gate dielectric layer on the substrate; forming a dielectric barrier layer structure on the gate dielectric layer, a first silicon source gas being used to dope silicon in the dielectric barrier layer structure; forming a work function layer on the dielectric barrier layer structure; forming a gate barrier layer structure on the work function layer, a second silicon source gas being used to dope silicon in the gate barrier layer structure; and forming a gate electrode layer on the gate barrier layer structure.


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