The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2019

Filed:

Apr. 01, 2016
Applicant:

No. 24 Research Institute of China Electronics Technology Group Corporation, Chongqing, CN;

Inventors:

Kaizhou Tan, Chongqing, CN;

Gangyi Hu, Chongqing, CN;

Zhaohuan Tang, Chongqing, CN;

Jianan Wang, Chongqing, CN;

Yonghui Yang, Chongqing, CN;

Yi Zhong, Chongqing, CN;

Yang Cao, Chongqing, CN;

Yong Liu, Chongqing, CN;

Kunfeng Zhu, Chongqing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/40 (2006.01); H01L 29/78 (2006.01); H01L 29/861 (2006.01); H01L 21/02 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/36 (2006.01); H01L 29/872 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01); H01L 21/321 (2006.01); H01L 21/3213 (2006.01);
U.S. Cl.
CPC ...
H01L 29/405 (2013.01); H01L 21/02057 (2013.01); H01L 21/0262 (2013.01); H01L 21/02271 (2013.01); H01L 21/02532 (2013.01); H01L 21/02595 (2013.01); H01L 29/0634 (2013.01); H01L 29/0696 (2013.01); H01L 29/1095 (2013.01); H01L 29/36 (2013.01); H01L 29/66136 (2013.01); H01L 29/78 (2013.01); H01L 29/7811 (2013.01); H01L 29/861 (2013.01); H01L 29/872 (2013.01); H01L 21/0223 (2013.01); H01L 21/02255 (2013.01); H01L 21/31116 (2013.01); H01L 21/3212 (2013.01); H01L 21/32135 (2013.01); H01L 29/407 (2013.01);
Abstract

A semiconductor cell structure and power semiconductor device, wherein, the semiconductor cell structure includes: a highly-doped semiconductor material region, an epitaxial layer, a dielectric insulating layer, a semi-insulating material, and an active device region, a deep groove is further etched on the epitaxial layer, the deep groove vertically extends into the highly-doped semiconductor material region, the dielectric insulating layer is formed on a side wall inside the deep groove, and the deep groove is filled with the semi-insulating material. The cell structure can be applied to the power semiconductor device during actual application, the present invention dramatically reduces the difficulty of the process implementation, relaxes the harsh requirements on charge balance, broadens the tolerant charge mismatch percentage by approximately ten times, and also improves the long-term reliability of normal operation of the device cell at the same time.


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