The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2019
Filed:
Dec. 26, 2015
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Donald S. Gardner, Los Altos, CA (US);
Edward A. Burton, Hillsboro, OR (US);
Gerhard Schrom, Gales Creek, OR (US);
Larry E. Mosley, Santa Clara, CA (US);
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/16 (2006.01); H01L 25/07 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 49/02 (2006.01); H01L 21/50 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 25/16 (2013.01); H01L 21/50 (2013.01); H01L 23/49816 (2013.01); H01L 24/16 (2013.01); H01L 25/07 (2013.01); H01L 28/10 (2013.01); H01L 28/40 (2013.01); H01L 28/87 (2013.01); H01L 28/91 (2013.01); H01L 29/2003 (2013.01); H01L 2224/16225 (2013.01);
Abstract
Embodiments are generally directed to integrated passive devices on chip. An embodiment of a device includes a semiconductor die; a semiconductor die package, a first side of the package being coupled with the semiconductor die; and one or more separate dies to provide passive components for operation of the semiconductor die, wherein the passive components for operation of the semiconductor die includes inductors.