The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 01, 2019

Filed:

Dec. 13, 2017
Applicant:

D2s, Inc., San Jose, CA (US);

Inventors:

Akira Fujimura, Saratoga, CA (US);

Kazuyuki Hagiwara, Tokyo, JP;

Robert C. Pack, Morgan Hill, CA (US);

Assignee:

D2S, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01J 37/317 (2006.01); G03F 1/78 (2012.01); G03F 7/20 (2006.01); H01J 37/302 (2006.01); G03F 1/36 (2012.01);
U.S. Cl.
CPC ...
H01J 37/3174 (2013.01); G03F 1/36 (2013.01); G03F 1/78 (2013.01); G03F 7/2063 (2013.01); H01J 37/3023 (2013.01); H01J 37/3026 (2013.01); H01J 37/3177 (2013.01); H01J 2237/31762 (2013.01); H01J 2237/31764 (2013.01); H01J 2237/31771 (2013.01); H01J 2237/31774 (2013.01); H01J 2237/31776 (2013.01);
Abstract

A method for mask process correction or forming a pattern on a reticle using charged particle beam lithography is disclosed, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern, and where pattern exposure information is modified to increase edge slope of the reticle pattern where sensitivity of the wafer pattern is high. A method for fracturing or mask data preparation is also disclosed, where pattern exposure information is determined that can form a pattern on a reticle using charged particle beam lithography, where the reticle is to be used in an optical lithographic process to form a pattern on a wafer, and where sensitivity of the wafer pattern is calculated with respect to changes in dimension of the reticle pattern.


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