The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 24, 2019
Filed:
Jun. 13, 2016
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Joshua Tseng, Tervuren, BE;
Yasutoshi Okuno, Osaka, JP;
Lars-Ake Ragnarsson, Leuven, BE;
Tom Schram, Rixensart, BE;
Stefan Kubicek, Pellenberg, BE;
Thomas Y Hoffman, Leuven, BE;
Naohisa Sengoku, Osaka, JP;
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., Hsinchu, TW;
Abstract
A method for manufacturing a dual work function semiconductor device includes forming a first silicon oxide layer on a substrate and forming a first hafnium-containing dielectric material layer on the first silicon oxide layer. The method further includes forming an aluminum-containing dielectric material layer on the first hafnium-containing dielectric material layer and performing a thermal treatment to intermix the silicon oxide layer, the first hafnium-containing dielectric material layer and the aluminum-containing dielectric material layers. This results in an intermixing dielectric layer containing hafnium, aluminum, silicon, and oxygen. The method further includes forming a first metal-containing conductive layer on the intermixing dielectric layer and patterning the first metal-containing conductive layer and the intermixing dielectric layer, thereby forming a first gate stack in a first region.