The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 17, 2019
Filed:
Feb. 12, 2018
Semiconductor Manufacturing International (Shanghai) Corporation, Shanghai, CN;
Semiconductor Manufacturing International (Beijing) Corporation, Beijing, CN;
Jiaqi Yang, Shanghai, CN;
Jie Zhao, Shanghai, CN;
Abstract
A method of manufacturing a semiconductor device includes providing a substrate structure including a semiconductor substrate, an interlayer dielectric layer on the semiconductor substrate, multiple trenches extending through the interlayer dielectric layer to the semiconductor substrate and having a first trench of a PMOS device and a second trench of an NMOS device, and a high-k dielectric layer on sidewalls and a bottom of the trenches. The method also includes forming a semiconductor layer filling the trenches, removing the semiconductor layer in the first trench, forming a PMOS work function adjustment layer in the first trench and a metal electrode layer on the PMOS work function adjustment layer in the first trench, removing the semiconductor layer in the second trench, and forming an NMOS work function adjustment layer in the second trench and a metal electrode layer on the NMOS work function adjustment layer in the second trench.