The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 10, 2019
Filed:
Jun. 22, 2018
Applicant:
Kyocera International, Inc., San Diego, CA (US);
Inventors:
Assignee:
Kyocera International, Inc., San Diego, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/495 (2006.01); H01L 23/367 (2006.01); H01L 21/48 (2006.01); H01L 23/08 (2006.01); H01L 23/04 (2006.01); H01L 23/538 (2006.01); H01L 23/36 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49541 (2013.01); H01L 21/4839 (2013.01); H01L 21/4871 (2013.01); H01L 23/041 (2013.01); H01L 23/08 (2013.01); H01L 23/36 (2013.01); H01L 23/367 (2013.01); H01L 23/5389 (2013.01); H01L 2223/6644 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48247 (2013.01); H01L 2924/15 (2013.01);
Abstract
Package deflection and mechanical stress of microelectronic packaging is minimized in a two step manufacturing process. In a first step, a ceramic insulator is high-temperature bonded between a wraparound lead layer and a buffer layer of a same material as the lead layer to provide a symmetrically balanced three-layer structure. In a second step, the three-layer structure is high temperature bonded, using a lower melt point braze, to a heat spreader. This package configuration minimizes package deflection, and thereby improves thermal dissipation and reliability of the package.