The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 10, 2019

Filed:

Apr. 28, 2017
Applicant:

Ansys, Inc., Canonsburg, PA (US);

Inventors:

Vamsi Krishna Yaddanapudi, Maharashatra, IN;

Ankit R. Adhiya, Maharastra, IN;

Aniket A. Kulkarni, Maharashtra, IN;

Manoj Nagulapally, Austin, TX (US);

Assignee:

Ansys, Inc., Canonsburg, PA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/20 (2006.01); G06F 9/50 (2006.01); G06F 11/30 (2006.01); G06F 17/50 (2006.01); G06F 1/3203 (2019.01); G06F 1/3287 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/206 (2013.01); G06F 17/5036 (2013.01); G06F 1/3203 (2013.01); G06F 9/5094 (2013.01); G06F 11/3062 (2013.01); G06F 17/5009 (2013.01);
Abstract

The current subject matter provides for the generation of network models for multi-chip module packages that are a combination of compact models for each chip within such packages. In some variations, a combination of single chip extraction methods and a linear superposition technique can be used to predict junction temperatures of MCM packages. Related methods, systems, apparatus, and articles are also described.


Find Patent Forward Citations

Yaddanapudi, Vamsi. (2019). Multi-chip module package compact thermal models (U.S. Patent No. 10409358). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10409358

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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