The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 03, 2019

Filed:

Apr. 10, 2018
Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Hsien-Wen Chen, Taichung, TW;

Shih-Ching Chen, Taichung, TW;

Chieh-Lung Lai, Taichung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/683 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01); H01L 23/15 (2006.01);
U.S. Cl.
CPC ...
H01L 24/81 (2013.01); H01L 21/486 (2013.01); H01L 21/6835 (2013.01); H01L 23/49827 (2013.01); H01L 21/568 (2013.01); H01L 23/15 (2013.01); H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 24/13 (2013.01); H01L 24/16 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 2221/68345 (2013.01); H01L 2221/68381 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16238 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81 (2013.01); H01L 2224/81193 (2013.01); H01L 2224/83104 (2013.01); H01L 2224/92125 (2013.01); H01L 2224/97 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A package structure includes a dielectric layer having opposing first and second surfaces, a wiring layer formed on the first surface and having a plurality of conducive vias that penetrate the dielectric layer, an electronic component disposed on the first surface of the dielectric layer and electrically connected to the wiring layer, an encapsulant encapsulating the electronic component, and a packaging substrate disposed on the second surface and electrically connected to the conductive vias. With the dielectric layer in replacement of a conventional silicon board and the wiring layer as a signal transmission medium between the electronic component and the packaging substrate, the package structure does not need through-silicon vias. Therefore, the package structure has a simple fabrication process and a low fabrication cost. The present invention further provides a method of fabricating the package structure.


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