The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Jul. 07, 2017
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Ashish Kumar Jha, Saratoga Springs, NY (US);

Haiting Wang, Clifton Park, NY (US);

Wei Hong, Clifton Park, NY (US);

Wei Zhao, Fort Lee, NJ (US);

Tae Jeong Lee, Clifton Park, NY (US);

Zhenyu Hu, Clifton Park, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 21/3213 (2006.01); H01L 21/8234 (2006.01); H01L 21/311 (2006.01); H01L 21/033 (2006.01); H01L 21/02 (2006.01); H01L 21/027 (2006.01); H01L 21/321 (2006.01); H01L 21/3105 (2006.01); H01L 21/3205 (2006.01); H01L 29/66 (2006.01); H01L 21/475 (2006.01); H01L 29/43 (2006.01); H01L 27/02 (2006.01); H01L 27/118 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7855 (2013.01); H01L 21/0217 (2013.01); H01L 21/0228 (2013.01); H01L 21/0276 (2013.01); H01L 21/02164 (2013.01); H01L 21/31053 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/3212 (2013.01); H01L 21/32055 (2013.01); H01L 21/32133 (2013.01); H01L 21/32139 (2013.01); H01L 21/475 (2013.01); H01L 21/823431 (2013.01); H01L 21/823437 (2013.01); H01L 21/823481 (2013.01); H01L 27/0207 (2013.01); H01L 27/0886 (2013.01); H01L 29/435 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H01L 21/0337 (2013.01); H01L 21/31144 (2013.01); H01L 29/66484 (2013.01); H01L 29/66545 (2013.01); H01L 2027/11805 (2013.01); H01L 2027/11831 (2013.01); H01L 2029/7858 (2013.01);
Abstract

A method of manufacturing a semiconductor device includes the formation of an oxide spacer layer to modify the critical dimension of a gate cut opening in connection with a replacement metal gate process. The oxide spacer layer is deposited after etching a gate cut opening in an overlying hard mask such that the oxide spacer layer is deposited onto sidewall surfaces of the hard mask within the opening and directly over the top surface of a sacrificial gate. The oxide spacer may also be deposited into recessed regions within an interlayer dielectric located adjacent to the sacrificial gate. By filling the recessed regions with an oxide, the opening of trenches through the oxide spacer layer and the interlayer dielectric to expose source/drain junctions can be simplified.


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