The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Nov. 27, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Chau Fatt Chiang, Melaka, MY;

Chan Lam Cha, Melaka, MY;

Wei Han Koo, Melaka, MY;

Andreas Kucher, Villach, AT;

Theng Chao Long, Melaka, MY;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 21/60 (2006.01); H01L 23/495 (2006.01); H03K 17/687 (2006.01); H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H02M 1/088 (2006.01); H02P 27/04 (2016.01);
U.S. Cl.
CPC ...
H01L 23/49575 (2013.01); H01L 21/4803 (2013.01); H01L 21/4825 (2013.01); H01L 21/565 (2013.01); H01L 23/3114 (2013.01); H01L 23/4951 (2013.01); H01L 23/4952 (2013.01); H01L 23/49537 (2013.01); H01L 23/49562 (2013.01); H01L 23/49568 (2013.01); H03K 17/6871 (2013.01); H02M 1/088 (2013.01); H02P 27/04 (2013.01);
Abstract

A semiconductor package includes a plurality of half bridge assemblies each including a metal lead, a first power transistor die attached to a first side of the metal lead, and a second power transistor die disposed under the first power transistor die and attached to a second side of the metal lead opposite the first side. Each metal lead has a notch which exposes one or more bond pads at a side of the second power transistor die attached to the metal lead. The semiconductor package also includes a controller die configured to control the power transistor dies. Each power transistor die, each metal lead and the controller die are embedded in a mold compound. Bond wire connections are provided between the controller die and the one or more bond pads at the side of each second power transistor die exposed by the notch in the corresponding metal lead.


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