The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 27, 2019

Filed:

Aug. 29, 2017
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Tzung-Yi Tsai, Taoyuan, TW;

Yen-Ming Chen, Hsin-chu County, TW;

Dian-Hau Chen, Hsinchu, TW;

Han-Ting Tsai, Kaoshiung, TW;

Tsung-Lin Lee, Hsinchu, TW;

Chia-Cheng Ho, Hsinchu, TW;

Ming-Shiang Lin, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/308 (2006.01); H01L 21/311 (2006.01); H01L 27/092 (2006.01); H01L 21/3115 (2006.01);
U.S. Cl.
CPC ...
H01L 21/3081 (2013.01); H01L 21/3086 (2013.01); H01L 21/31111 (2013.01); H01L 21/31116 (2013.01); H01L 21/31155 (2013.01); H01L 27/0924 (2013.01);
Abstract

A method of forming a semiconductor device is disclosed. The method includes providing a device having a substrate and a hard mask layer over the substrate; forming a mandrel over the hard mask layer; depositing a material layer on sidewalls of the mandrel; implanting a dopant into the material layer; performing an etching process on the hard mask layer using the mandrel and the material layer as an etching mask, thereby forming a patterned hard mask layer, wherein the etching process concurrently produces a dielectric layer deposited on sidewalls of the patterned hard mask layer, the dielectric layer containing the dopant; and forming a fin by etching the substrate using the patterned hard mask layer and the dielectric layer collectively as an etching mask.


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