The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 27, 2019
Filed:
Jul. 15, 2016
Shin-etsu Handotai Co., Ltd., Tokyo, JP;
Yoshihiro Usami, Nishigo-mura, JP;
Shiro Amagai, Nishigo-mura, JP;
SHIN-ETSU HANDOTAI CO., LTD., Tokyo, JP;
Abstract
A method for manufacturing a semiconductor wafer including: slicing off a plurality of wafers from an ingot; chamfering outer peripheral portions of the plurality of sliced wafers; and performing double-side polishing to polish both surfaces of each wafer whose outer peripheral portion is held by a carrier, wherein includes performing warp direction adjustment to uniform directions of warps of the plurality of wafers in one direction after the slicing and before the chamfering, and the chamfering and the double-side polishing are performed in a state where the directions of the warps of the plurality of wafers are uniformed in one direction after the warp direction adjustment. Consequently, it is possible to provide the method for manufacturing a semiconductor wafer which can suppress degradation of flatness of the double-side polished wafers even in case of uniforming the directions of the warps of the wafers in one direction before the double-side polishing.