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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10391608 B1

PDFFull Text
Date of Patent:
Aug. 27, 2019

Filed:

Dec. 27, 2017

Backside polisher with dry frontside design and method using the same

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Chih-Hung Chen, Hsin-Chu, TW;

Chia-Jung Hsu, Changhua County, TW;

Yi-An Lin, Taipei, TW;

Assignee:

TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu, TW;

Attorney:

Haynes and Boone, LLP

Primary Examiner:

Joseph C Nicely

Int. Cl.
CPC ...
B24B 37/30 (2012.01); B24B 37/10 (2012.01); H01L 21/67 (2006.01); H01L 21/02 (2006.01); H01L 21/321 (2006.01); H01L 21/673 (2006.01); H01L 21/683 (2006.01); B24B 37/04 (2012.01);
U.S. Cl.
CPC ...
B24B 37/30 (2013.01); B24B 37/04 (2013.01); B24B 37/10 (2013.01); H01L 21/0209 (2013.01); H01L 21/02013 (2013.01); H01L 21/02016 (2013.01); H01L 21/3212 (2013.01); H01L 21/32115 (2013.01); H01L 21/673 (2013.01); H01L 21/67046 (2013.01); H01L 21/67092 (2013.01); H01L 21/67219 (2013.01); H01L 21/683 (2013.01);
Abstract

A wafer polishing apparatus is described herein. The wafer polishing apparatus includes a polish module configured to apply air pressure to a first surface of a wafer while performing a polishing process on a second surface of the wafer. In some implementations, the polish module is further configured to perform a cleaning process and/or a drying process on the second surface of the wafer, such that the same wafer polishing apparatus is configured to perform the polishing process, the cleaning process, and/or the drying process. In some implementations, the polishing module is further configured to air seal edges of the wafer during the polishing process, the cleaning process, and/or the drying process.

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