The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Jan. 22, 2018
Applicant:

Vanguard International Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chih-Cherng Liao, Hsinchu County, TW;

Manoj Kumar, Jharkhand, IN;

Chia-Hao Lee, New Taipei, TW;

Chung-Te Chou, Hsinchu, TW;

Ya-Han Liang, Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 21/265 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66704 (2013.01); H01L 21/265 (2013.01); H01L 29/1095 (2013.01); H01L 29/4236 (2013.01); H01L 29/7825 (2013.01);
Abstract

A method for fabricating a semiconductor structure includes providing a substrate. The method further includes implanting the substrate to form a high-voltage well region having a first conductivity type. The method further includes forming a pair of drain drift regions in the high-voltage well region. The pair of drain drift regions are on the front side of the substrate, and the pair of drain drift regions have a second conductivity type opposite to the first conductivity type. The method further includes forming a gate electrode embedded in the high-voltage well region. The gate electrode is positioned between the pair of drain drift regions and laterally spaced apart from the pair of drain drift regions.


Find Patent Forward Citations

Loading…