The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 20, 2019

Filed:

Apr. 18, 2017
Applicant:

Amkor Technology, Inc., Tempe, AZ (US);

Inventors:

Jin Young Kim, Seoul, KR;

Doo Hyun Park, Seongnam-si, KR;

Ju Hoon Yoon, Namyangju-si, KR;

Seong Min Seo, Seoul, KR;

Glenn Rinne, Apex, NC (US);

Choon Heung Lee, Seoul, KR;

Assignee:

Amkor Technology, Inc., Tempe, AZ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/31 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 25/50 (2013.01); H01L 25/0657 (2013.01); H01L 21/568 (2013.01); H01L 23/3128 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05552 (2013.01); H01L 2224/05571 (2013.01); H01L 2224/06181 (2013.01); H01L 2224/13022 (2013.01); H01L 2224/1403 (2013.01); H01L 2224/14181 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16147 (2013.01); H01L 2224/16237 (2013.01); H01L 2224/81005 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06572 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01);
Abstract

Provided are a semiconductor device using, for example, an epoxy molding compound (EMC) wafer support system and a fabricating method thereof, which can, for example, adjust a thickness of the overall package in a final stage of completing the device while shortening a fabricating process and considerably reducing the fabrication cost. An example semiconductor device may comprise a first semiconductor die that comprises a bond pad and a through silicon via (TSV) connected to the bond pad; an interposer comprising a redistribution layer connected to the bond pad or the TSV and formed on the first semiconductor die, a second semiconductor die connected to the redistribution layer of the interposer and positioned on the interposer; an encapsulation unit encapsulating the second semiconductor die, and a solder ball connected to the bond pad or the TSV of the first semiconductor die.


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