The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 13, 2019
Filed:
Apr. 29, 2016
Csmc Technologies Fab2 Co., Ltd., Jiangsu, CN;
Jun Sun, Jiangsu, CN;
Zhongyu Lin, Jiangsu, CN;
Guangyang Wang, Jiangsu, CN;
Guipeng Sun, Jiangsu, CN;
CSMC TECHNOLOGIES FAB2 CO., LTD., Jiangsu, CN;
Abstract
An electrostatic protection device of an LDMOS silicon controlled structure comprises a P-type substrate (), an N-well () and a P-well () on the substrate, a gate electrode () overlapping on the P-well () and extending to an edge of the N-well (), a first N+ structure and a first P+ structure provided in the N-well (), and a second N+ structure and a second P+ structure provided in the P-well (), the first N+ structure being a drain electrode N+ structure (), the first N+ structure being a drain electrode N+ structure (), the first P+ structure being a drain electrode P+ structure (), the second N+ structure being a source electrode N+ structure (), the second P+ structure being a source P+ structure (), and a distance from the drain electrode P+ structure () to the gate electrode () being greater than a distance from the drain electrode N+ structure () to the gate electrode ().