The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 30, 2019

Filed:

Jan. 25, 2018
Applicant:

United Microelectronics Corp., Hsin-Chu, TW;

Inventors:

Hsu Ting, Tainan, TW;

Yu-Ying Lin, Tainan, TW;

Yen-Hsing Chen, Taipei, TW;

Chun-Jen Chen, Tainan, TW;

Chun-Wei Yu, Tainan, TW;

Keng-Jen Lin, Kaohsiung, TW;

Yu-Ren Wang, Tainan, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 27/0886 (2013.01); H01L 21/823431 (2013.01); H01L 21/823481 (2013.01); H01L 29/0653 (2013.01); H01L 29/66545 (2013.01);
Abstract

A semiconductor device includes a semiconductor substrate, an isolation structure, a cladding layer, and a gate structure. The semiconductor substrate includes fin shaped structures. The isolation structure is disposed between the fin shaped structures. Each of the fin shaped structures includes a first portion disposed above a top surface of the isolation structure and a second portion disposed on the first portion. A width of the second portion is smaller than a width of the first portion. The cladding layer is disposed on the first portion and the second portion of each of the fin shaped structures. The cladding layer includes a curved surface. The gate structure is disposed straddling the fin shaped structures.


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