The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 23, 2019
Filed:
Jun. 21, 2016
Applicants:
Lars-erik Wernersson, Lund, SE;
Johannes Svensson, Lund, SE;
Martin Berg, Lund, SE;
Karl-magnus Persson, Lund, SE;
Erik Lind, Lund, SE;
Inventors:
Lars-Erik Wernersson, Lund, SE;
Johannes Svensson, Lund, SE;
Martin Berg, Lund, SE;
Karl-Magnus Persson, Lund, SE;
Erik Lind, Lund, SE;
Assignee:
Other;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); B82Y 10/00 (2011.01); B82Y 40/00 (2011.01); H01L 29/40 (2006.01); H01L 29/423 (2006.01); H01L 29/739 (2006.01); H01L 29/775 (2006.01); H01L 29/06 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66666 (2013.01); B82Y 10/00 (2013.01); B82Y 40/00 (2013.01); H01L 29/068 (2013.01); H01L 29/0676 (2013.01); H01L 29/401 (2013.01); H01L 29/42376 (2013.01); H01L 29/66469 (2013.01); H01L 29/66522 (2013.01); H01L 29/7391 (2013.01); H01L 29/775 (2013.01);
Abstract
A method for fabrication of vertical nanowire MOSFETs is considered using a gate-last process. The top ohmic electrode is first fabricated and may be used as a mask to form a gate recess using etching techniques. The gate is thereafter formed allowing a large degree in access resistance reduction.