The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 16, 2019
Filed:
Feb. 21, 2017
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Eng Ling Ho, Simpang Ampat, MY;
Sean Atsatt, Santa Cruz, CA (US);
Chiew Siang Wong, Bayan Lepas, MY;
Chin Hai Ang, Bayan Lepas, MY;
Rob Pelt, Austin, TX (US);
Ee Mei Ooi, Bayan Lepas, MY;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 12/24 (2006.01); H04L 29/08 (2006.01);
U.S. Cl.
CPC ...
H04L 41/00 (2013.01); H04L 67/34 (2013.01);
Abstract
Methods and systems for configuring a programmable logic device include receiving configuration data at an input of a first sector of the programmable logic device and dynamically routing the configuration data through the first sector to a second sector of the programmable device by selecting a first routing path out of the first sector or a second routing path out of the first sector.