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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10354954 B1

PDFFull Text
Date of Patent:
Jul. 16, 2019

Filed:

Jun. 25, 2018

Copper etching integration scheme

Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Inventors:

Chih-Wei Lu, Hsinchu, TW;

Chung-Ju Lee, Hsinchu, TW;

Hsiang-Huan Lee, Jhudong Township, TW;

Tien-I Bao, Taoyuan, TW;

Assignee:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;

Attorney:

Eschweiler & Potashnik, LLC

Primary Examiner:

Reema Patel

Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/528 (2006.01); H01L 23/538 (2006.01); H01L 23/532 (2006.01); H01L 21/768 (2006.01); H01L 29/06 (2006.01); H01L 21/3105 (2006.01); H01L 21/3213 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5283 (2013.01); H01L 21/31053 (2013.01); H01L 21/32139 (2013.01); H01L 21/7682 (2013.01); H01L 21/76852 (2013.01); H01L 21/76885 (2013.01); H01L 21/76892 (2013.01); H01L 23/5226 (2013.01); H01L 23/5329 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01); H01L 23/53214 (2013.01); H01L 23/53228 (2013.01); H01L 23/53233 (2013.01); H01L 23/53238 (2013.01); H01L 23/53257 (2013.01); H01L 23/53266 (2013.01); H01L 23/53295 (2013.01); H01L 29/0649 (2013.01); H01L 23/5222 (2013.01); H01L 23/53223 (2013.01); H01L 2924/0002 (2013.01);
Abstract

The present disclosure, in some embodiments, relates to an interconnect structure. The interconnect structure has a metal body disposed over a substrate, and a metal projection protruding outward from an upper surface of the metal body. A dielectric layer is disposed over the substrate and surrounds the metal body and the metal projection. A barrier layer separates the metal body and the metal projection from the dielectric layer.

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Lu, Chih-Wei. (2019). Copper etching integration scheme (U.S. Patent No. 10354954). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10354954

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