The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 16, 2019

Filed:

Jun. 24, 2018
Applicants:

United Microelectronics Corp., Hsin-Chu, TW;

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;

Inventors:

Feng-Yi Chang, Tainan, TW;

Yu-Cheng Tung, Kaohsiung, TW;

Fu-Che Lee, Taichung, TW;

Ying-Chih Lin, Tainan, TW;

Assignees:

UNITED MICROELECTRONICS CORP., Hsin-Chu, TW;

Fujian Jinhua Integrated Circuit Co., Ltd., Quanzhou, Fujian Province, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/033 (2006.01); H01L 27/108 (2006.01);
U.S. Cl.
CPC ...
H01L 21/0337 (2013.01); H01L 27/1085 (2013.01);
Abstract

A semiconductor device and a method of forming the same, the semiconductor device includes a substrate and a material layer. The substrate has a first region, and the material layer is disposed on the substrate. The material layer includes plural of first patterns and plural of second patterns arranged in an array, and two third patterns. The first patterns are disposed within the first region, the second patterns are disposed at two opposite outer sides of the first region, and the third patterns are disposed at another two opposite outer sides of the first region, wherein each of the third patterns partially merges each of a part of the first patterns and each of a part of the second patterns.


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