The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

May. 29, 2018
Applicant:

Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;

Inventors:

Pin-Ju Liang, Hsinchu, TW;

De-Wei Yu, Ping-tung, TW;

Yi-Cheng Li, Hsinchu, TW;

Chien-Hao Chen, Chuangwei Township, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 21/31 (2006.01); H01L 21/3105 (2006.01); H01L 29/49 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66545 (2013.01); H01L 21/0228 (2013.01); H01L 21/02356 (2013.01); H01L 21/02362 (2013.01); H01L 21/823431 (2013.01); H01L 27/0886 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

Embodiments disclosed herein relate generally to forming a gate layer in high aspect ratio trenches using a cyclic deposition-etch process. In an embodiment, a method for semiconductor processing is provided. The method includes performing a cyclic deposition-etch process to form a conformal film over a bottom surface and along sidewall surfaces of a feature on a substrate. The method includes reflowing the conformal film. The method includes forming a cap layer on the reflowed film. The method includes depositing a crystalline film on the cap layer. The method includes crystallizing the reflowed film and the cap layer after depositing the crystalline film.


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