The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 09, 2019

Filed:

Dec. 02, 2016
Applicant:

Globalfoundries Inc., Grand Cayman, KY;

Inventors:

Xusheng Wu, Ballston Lake, NY (US);

Min-hwa Chi, Malta, NY (US);

Edmund Kenneth Banghart, Pittsford, NY (US);

Assignee:

GLOBALFOUNDRIES INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/06 (2006.01); H01L 29/10 (2006.01); H01L 29/16 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66537 (2013.01); H01L 29/0653 (2013.01); H01L 29/1033 (2013.01); H01L 29/1083 (2013.01); H01L 29/16 (2013.01); H01L 29/6656 (2013.01); H01L 29/66795 (2013.01); H01L 29/66803 (2013.01); H01L 29/66818 (2013.01); H01L 29/7851 (2013.01); H01L 29/7853 (2013.01);
Abstract

A method of forming a FinFET fin with low-doped and a highly-doped active portions and/or a FinFET fin having tapered sidewalls for Vt tuning and multi-Vt schemes and the resulting device are provided. Embodiments include forming an Si fin, the Si fin having a top active portion and a bottom active portion; forming a hard mask on a top surface of the Si fin; forming an oxide layer on opposite sides of the Si fin; implanting a dopant into the Si fin; recessing the oxide layer to reveal the active top portion of the Si fin; etching the top active portion of the Si fin to form vertical sidewalls; forming a nitride spacer covering each vertical sidewall; recessing the recessed oxide layer to reveal the active bottom portion of the Si fin; and tapering the active bottom portion of the Si fin.


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